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moderate
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cross-posted from: [discuss.tchncs.de/post/3011500](https://discuss.tchncs.de/post/3011500)\n
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> Many volume applications use FPGA because they need in-field reconfigurability (changing standards, changing algorithms, etc) but they want to improve their system’s competitiveness (power, size, cost). FPGAs are bulky, expensive and power hungry. Integrating eFPGA can greatly improve the economics while maintaining full reconfigurability and performance.\n
> \n
> We’ve found with customers that a significant portion of the LUTs in their designs don’t change with reconfigurations: they are fixed buses to bring data to and from the reconfigurable core. This can be hardwired so the number of LUTs needed in the SoC is typically half of what’s in the FPGA. There is also a lot of cost of voltage regulators for an FPGA that disappear with integration.\n
> \n
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3 |
DENIED
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edit
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App\Entity\Entry {#1846
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**Projects, pictures, industry discussions and news about electronic engineering & component-level electronic circuits.**\n
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Rules\n
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\n
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cross-posted from: [discuss.tchncs.de/post/3011500](https://discuss.tchncs.de/post/3011500)\n
\n
> Many volume applications use FPGA because they need in-field reconfigurability (changing standards, changing algorithms, etc) but they want to improve their system’s competitiveness (power, size, cost). FPGAs are bulky, expensive and power hungry. Integrating eFPGA can greatly improve the economics while maintaining full reconfigurability and performance.\n
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Show voter details
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4 |
DENIED
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moderate
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App\Entity\Entry {#1846
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**Projects, pictures, industry discussions and news about electronic engineering & component-level electronic circuits.**\n
\n
Rules\n
-----\n
\n
1: Be nice.\n
\n
2: Be on-topic (eg: *Electronic*, not *electrical*).\n
\n
3: No commercial stuff, buying, selling or valuations.\n
\n
4: No circuit design or repair, tools or component questions.\n
\n
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\n
---\n
\n
*Ask questions in [discuss.tchncs.de/c/askelectronics](https://discuss.tchncs.de/c/askelectronics)*\n
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---
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cross-posted from: [discuss.tchncs.de/post/3011500](https://discuss.tchncs.de/post/3011500)\n
\n
> Many volume applications use FPGA because they need in-field reconfigurability (changing standards, changing algorithms, etc) but they want to improve their system’s competitiveness (power, size, cost). FPGAs are bulky, expensive and power hungry. Integrating eFPGA can greatly improve the economics while maintaining full reconfigurability and performance.\n
> \n
> We’ve found with customers that a significant portion of the LUTs in their designs don’t change with reconfigurations: they are fixed buses to bring data to and from the reconfigurable core. This can be hardwired so the number of LUTs needed in the SoC is typically half of what’s in the FPGA. There is also a lot of cost of voltage regulators for an FPGA that disappear with integration.\n
> \n
> Typically, the cost of eFPGA is 1/10th the cost of the FPGA it replaces but with the same speed and programmability. Power can also be cut to 1/10th because most of the power in an FPGA is the power-hungry PHYs that are mostly not needed when using eFPGA in the SoC.
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} |
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Show voter details
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5 |
DENIED
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edit
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App\Entity\Magazine {#289
+icon: Proxies\__CG__\App\Entity\Image {#270 …}
+name: "electronics@discuss.tchncs.de"
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**Projects, pictures, industry discussions and news about electronic engineering & component-level electronic circuits.**\n
\n
Rules\n
-----\n
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\n
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\n
3: No commercial stuff, buying, selling or valuations.\n
\n
4: No circuit design or repair, tools or component questions.\n
\n
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\n
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\n
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